PCIE名詞解釋
LTSSM: Link Training and Status State Machine
PCI-PM: 由軟體藉由調整configuration request 來調整
ASPM: 基於硬體的電源管理。同時定義了PME Message 的喚醒機制
L0: Fully Active 狀態
L0s: 低功耗模式，支持ASPM，由硬體主動發起，軟體無法控制。這是單向的，可以單獨一方進入L0s.
L1: 低功耗模式，支援PCI-PM以及ASPM的方式。有兩個子狀態(L1ss)L1.1以及L1.2
L1ss: L1 substates，，支援PCI-PM以及ASPM的方式。分為兩種L1.1 以及 L1.2，這兩種狀態是只有在進入L1時才能進入的，都是使用CLKREQ#來進出
L1.1: 比L1.0省電，保持Tx common mode電壓，關閉Electrical idle exit detect電路，關閉参考時鐘和PLL
L1.2: 比L1.1省電，關閉Tx common mode電壓，關閉Electrical idle exit detect電路，關閉参考時鐘和PLL，可以關閉Main Power
L2: 低功耗模式，支援PCI-PM的方式。關閉參考時鐘、關閉PLL、關閉Main Power，但保留Aux Power.
L3: 低功耗模式，支援PCI-PM的方式。處於Power-off的狀態
PERST#: PCIe Express Reset Request 訊號，De-assert(拉L)代表需要Reset，Asser(拉Ｈ)則反之，用於對裝置reset.
LTR: Latency Tolerance Reporting，EP端對於RC端的Memory Reads and Writes 的可以容忍延遲的要求
CLKREQ#: Clock Request 訊號，De-assert(拉L)代表需要CLK，Asser(拉Ｈ)則反之，用於進出L1ss
PME: Power Management Event, Sending a PME Message to the Root Complex to provide the souce of the wakeup event
L1.1 -> L0 -> L1.1 flow
By upstream(RC)
By downstream(EP)
L1.2 -> L0 -> L1.2 Flow
By upstream(RC)
By downstream(EP)
L2 -> Detect
Beacon or WAKE# to exit L2
D3hot: L0 -> L1SS -Wake up Event ->L1SS -PME-> L0
D3cold: L0 -> L2 -Wake up Event -> L2 -Wake#-> L0 -> L1SS -> PERST#(PME) -> L0
Device 名詞解釋
D0: The device is completely active and responsive. All relevant context is remembered.
D1/D2: An intermediate power state. Define by each device.
D3hot: The device is mostly turned off. However, the device is not disconnected from its main power source, and the parent bus controller can detect the presence of the device on the bus.
D3cold: The main power source is removed from the device, and the bus controller cannot detect the presence of the device.
System 名詞解釋
S0: Normal Powered-On state
S1: Sleeping with processor context maintained.
S2: Processor context is not maintained.
S3: All system context is lost except system memory
S4: Powered off all device. Keep memory context in hard disk.
S5: The system is in the off state and requires a complete boot.
Dynamic DTIM: Enter S3 need make DTIM1 -> DTIM5
Suspend: Stop Tx and no more Tx (Flush in HW queue packet)
